An improved way of teaching school kids digital electronics using venerable small-scale integration ICs

The current kits on the market are just copies of kits from 1970s, a lot of tedious activities such as adding a resistor for each button and switch, and a limited number of same old moving lights designs. Worst part: they offer no connection to what the modern chip designers do in the office: CPUs, GPUs, networking chips, ML accelerators. It does not have to be this way.

Back in 1970s California was a pioneer in teaching kids digital electronics using small-scale integration (SSI) chips like 7400 and CMOS 4000. Later on this way of teaching became unpopular due to three reasons:

3. The industry stopped using SSI chips in real applications, so this activity became somewhat disconnected from real jobs.
4. The teachers switched focus to the use of microcontrollers like Arduino and embedded CPUs like Raspberry Pi.
5. The process of assembling SS on the board was tedious (too many resistors) and included things that are difficult to explain to a 13-year-old, such as why do you need to add the capacitors to the 555 timer chip.

However the perception in (2) is a false one, since learning how to program Arduino in C is not “learning electronics”, it is more like an introduction to embedded system programming in a hobbyist way (i.e. without interrupt processing etc). One can argue that Arduino trains in electronic system design, integrating microcontrollers with sensors and actuators. But one thing is certain: Arduino has nothing to do with microelectronics, what is inside the chip.

Programming Arduino does not teach how a microcontroller itself is designed. To understand the microcontroller design (or the design of any digital chip in smartphones or AI accelerators), a student has to start from gates and D-flip-flops, then proceed to Register-Transfer-Level (RTL), SystemVerilog and labs with FPGA (Field Programmable Gate Array) boards.

Now the key point: nobody for the 55 years invented a better way to demo the function of a D-Flip-Flop than combining an SSI chip (CMOS 4013) with a 555 timer with a frequency of 1 Hz on a breadboard, together with some LEDs and buttons.

So SSI is still the way to introduce school kids to digital electronics. Kids generally prefer working with real objects rather than with simulators.

But we don’t have to copy the kits of 1970s exactly, there are plenty of optimizations:

1. We can use already assembled 555 timer modules instead of assembling a 555 chip with two capacitors and three resistors.

2. We can use breadboard power modules connected to USB rather than to a 9V battery. This makes a stable 5V power supply.

3. We can use 5V-tolerant LEDs so we don’t need to use any current-limiting resistors. There are also 5V-tolerant LED ladders.

4. We can use buttons with pull-down resistors embedded inside them so the students don’t need to add those pull-down resistors by themselves.

We are not simplifying the kits, we are just moving the complexity to solving the problems with sequential logic.

Now let’s talk about the exercises. We created the following set of exercises with CMOS 4000 chips before we moving the kids to the next steps: SystemVerilog, FPGAs and ASICs using TinyTapeout.

Basics

1. Demo 4081 (AND), 4071 (OR), 4069 (NOT), 4070 (XOR).
2. Demo 4013, D-flip-flop (DFF) with asynchronous reset.
3. Demo 4029 counter.
4. Demo 4015, a serial-to-parallel (SiPo – serial input / parallel output) shift register.
5. Explore a common-cathode single-digit seven-segment display and drive it with the 4511 chip.
6. Demo 4008, a 4-bit combinational adder. Use three 4511 chips to display the arguments and the result on three seven-segment displays.

Building blocks

1. Demo 4048, a reconfigurable gate.
2. Demo 4014, a parallel-to-serial (PiSo – parallel input / serial output) shift register.
3. Demo 4063, a 4-bit combinational comparator.
4. Demo multiplexers (MUXes) using 4051, 4052, 4053, 4019.
5. Demo 4028, BCD-to-decimal decoder. It will be used in projects to substitute a MUX with a combination decoder+selector based on AND and OR gates.
6. Demo 4532, 8-to-3 priority encoder. Use 4511 to display the output in decimal form.
7. Demo 4017, decade counter with decoded outputs.
8. Demo 40105, a FIFO.
9. Demo 40108, a 4×4 register file.
10. Demo 40181, a 4-bit ALU.

Mini-projects for review

1. Full adder using basic gates.
2. 2-bit combinational adder using full adder and half adder.
3. Replace 4051 mux with an equivalent design using 4028 decoder and a selector based on AND and OR gates.
4. Replace 4051 mux with an equivalent design using 4028 decoder and a selector based on 4086 AND-OR-NOT and 4069 inverter.
5. Replace 4052 mux with an equivalent design using 4555 decoder and a selector based on AND and OR gates.
6. Replace 4052 mux with an equivalent design using 4555 decoder and a selector based on 4086 AND-OR-NOT and 4069 inverter.
7. Demo 4019 data selector performing a bit-mask merge of two bit vectors. Compare it with an equivalent implementation using basic gates.
8. Johnson counter using 4015 shift register and 4069 inverter.

Projects

1. Demo 4032, a bit-serial adder. Combine it with two parallel-to-serial 4014 shift registers, one serial-to-parallel 4015 shift register and three 4511 display drivers to show the arguments and the result. Compare this way of doing addition to addition using a combinational adder 4008.
2. Replace 4032 with an equivalent design using logic gates (AND/NAND/OR/NOR/NOT/XOR) and a D-flip-flop (DFF) for carry.
3. Combine three 40105 FIFOs with a 4008 adder to add numbers coming in different clock cycles and control the flow of the result with backpressure.
4. Finite state machines (FSMs) for bit sequence recognition. Implement using basic gates and DFFs. You can use 4076 and 40174 DFFs instead of 4013.
5. Build a bit-serial comparator in FSM fashion using basic gates and D-flip-flops. Compare with a combinational comparator built using 4063.

Some students go all the way to build a CPU, this road is doable but might be not the most optimal. Instead once a student accomplish one of the multi-chip projects, we recommend the next step: exercises on FPGA boards. There are plenty of options: Xilinx, Altera, Gowin, Lattice, commercial and open-source toolchains – we are Verilog Meetup support them all. We also have a path to move a project from our FPGA-based infrastructure to TinyTapeout ASIC infrastructure, so the students can actually manufacture their own chips.

We at Verilog Meetup are always looking for the partners who can help us to create our set of exercises into kits, university curriculums and useful events. We already partnered with more than 30 universities on the exercises for the students and school kids is our next priority.