Verilog Meetup: the current and proposed projects as of 2025-12-25
articles, proposals

Verilog Meetup: the current and proposed projects as of 2025-12-25

by Yuri Panchul

1. The current needs in FPGA board support

  1. Altera: Terasic DE23-Lite. This is a new board for the same niche as DE10-Lite, but with >100K LUTs and HDMI.
  2. Sipeed Tang Console 60K and 138K: those boards are powerful and affordable, but not documented, because their target market is retro-gamers rather than computer architecture and RTL students.
  3. OneKiwi – a Gowin-based FPGA board from Vietnam.
  4. ChipInventor, Gowin board from Brazil

2. New projects other than FPGA board support

  1. Somebody needs to run the projects on TinyTapeout ASIC board and present it to other members.
  2. Integrate the Longsoon educational cores into the Basics/Graphics/Music (BGM) infrastructure. Use as examples the integration of RISC-V cores picorv32, yrv and aps.

3. The currently outstanding projects

  1. Textbook with Purdue University (Yuri Panchul, Dmitri Gusev et al): the progress is slow. Yuri wrote a chapter back in the Summer; other co-authors are dragging their feet.
  2. Conference papers: Yuri Panchul’s paper on SystemVerilog Microarchitecture Challenges for AI has been accepted for a major conference. Will give more information before the conference.
  3. Seminars abroad: the seminar in India we planned around the New Year has been postponed.
  4. Seminars in the US: Florida – discussed, Boston – on idea stage.
  5. Adopting Basics/Graphics/Music (BGM) examples for a new FPGA boards – see the details below.
  6. Adopting new RISC-V educational cores into BGM infrastructure: picorv32 (adopted by Alexander Ryabov), yrv_plus (Monte Dalrymple, adopted by Dmitry Petrenko), and aps (MIET, adopted by ButterSus).
  7. Adopting new peripherals for FPGA boards, together with new applications: Huaxuan (Jason) Yang with the light sensor, Vadim Ostrikov with acoustic_locator.
  8. Developing new EDA tools: GUI from Andrew DeKelaita and AI from Abhishek Varma.
  9. Enhancing SystemVerilog Homework and SystemVerilog Microarchitecture Challenges for AI (Mike Kuskov and others – see the repos for the participants).

4. Details on the boards

  1. Ryan Cramer is working on support for Sipeed Tang Console 138K (or 60K?), Digilent Cmod S7 and Cmod A7, Altera-based STEP-MAX10 and Microchip Hello FPGA board.
  2. Nathan Pham, Ethan James and Jason Yang are working with help from Maxim Kudinov on a Lattice-based iceBreaker board with DVI12 and DVI24 interfaces.
  3. Ramprakash Baskar is working with other Lattice boards, with help from Ruslan Zalata. The boards include iCESugar, iCESugar-nano, Olimex iCE40HX1K and iCE40HX8K, OrangeCrab, STEP-MXO2, TinyFPGA Bx.

5. Low-priority FPGA board support projects that can be used to educate new members

  1. The current implementation of Gowin-based Tang Mega 138K Dock is not consistent with other boards. We need to review the implementation.
  2. Gowin-based MiniStar Nano.
  3. Assemble and test the DE0-Nano board with VGA666 configuration.
  4. Implement board support for Xilinx-based Numato Lab Mimas A7 Mini. Two options: PmodVGA and TinyVGA-Pmod.
  5. Implement board support for the Altera-based BetterShengsun board.