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Verilog Meetup

Language, microarchitecture and design verification – for the industry and education

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Month: October 2025

A push for better workforce development in EE starts with the Verilog Meetup at Cal Poly San Luis Obispo
articles

A push for better workforce development in EE starts with the Verilog Meetup at Cal Poly San Luis Obispo

October 29, 2025October 29, 2025 by Yuri Panchul

The idea to make a Verilog Meetup event at California Polytechnic State University, San Luis […]

Moving your design from FPGA to ASIC using Verilog Meetup variant of the Tiny Tapeout template
articles

Moving your design from FPGA to ASIC using Verilog Meetup variant of the Tiny Tapeout template

October 20, 2025October 21, 2025 by Yuri Panchul

The coming Verilog Meetup at Cal Poly SLO will include an FPGA hackathon with a […]

Verilog Meetup at Cal Poly San Luis Obispo, California on October 25-26
articles, proposals

Verilog Meetup at Cal Poly San Luis Obispo, California on October 25-26

October 11, 2025October 16, 2025 by Yuri Panchul

The meetup location is planned for Advanced Technology Laboratories on Cal Poly’s main campus in San Luis […]

Photos from Maker Faire Bay Area 2025 in Vallejo, California
articles

Photos from Maker Faire Bay Area 2025 in Vallejo, California

October 3, 2025 by Yuri Panchul

Maker Faire is a kind of mini-Burning Man for the hobbyists of all kinds, however […]

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