Have you ever wondered what it’s like to delve into the intricate design of a CPU? Let’s explore together.

For a digital logic designer like me, the chance to construct, modify, and test a microprocessor is a unique and thrilling opportunity. In my professional journey, I started with discrete logical gates, progressed to microprocessors, and eventually witnessed the emergence of single-chip computers. The rapid evolution of technology led to the advent of systems on a chip. With this progress, FPGA technology empowered us to create intricate components by customizing chips using software for design, verification, and testing. 

From an academic standpoint, the prospect of having full access to the code required for creating a processor is a dream come true.

The RISC-V processor, with its origins deeply rooted in academia, was born at the University of California, Berkeley. It was the brainchild of a dedicated team of researchers led by the esteemed Professor David Patterson in the late 1980s.

The RISC-V processor was designed as a simple, efficient, and open-source alternative to the complex and expensive proprietary processors. The RISC-V team believed a simpler processor could be more efficient and easier to design and implement.

The RISC-V processor is based on the reduced instruction set computer (RISC) architecture, which uses a small set of simple instructions that are easy to decode and execute. This makes the RISC-V processor faster and more power-efficient than processors that use complex instructions.

The RISC-V processor is also open-source, meaning anyone can use, modify, and distribute the design. This has led to a large community of developers contributing to the RISC-V project, making it one of the most popular open-source processor designs in the world.

To learn more about the RISC design, the book Inside the Open Source Processor by Monte Dalrymple explains everything about the processor, as you can find in this summary.

Yuri Panchul implemented the code in the de10_lite boards and documented following the same structure he used for lecture teaching in universities using the Altera FPGA from Terasic.

The material allows students to explore various RISC-V CPU cores in the board-independent platform to allow the students to compare different microarchitectures, from a simplified single-cycle implementation of a subset of RISC-V architecture – to cache-less MCU-level cores – to more complicated cores with caches, TLB MMU, superscalar execution and the ability to run Linux. Using open-source material and tools available online for free.

Today, anyone can explore the complex world of processor design using a low-cost laptop and online resources.