For the last 30 years digital chip design is not done by schematic entry anymore: […]
Month: December 2023
Toward the January meetup on portable SystemVerilog examples in Silicon Valley
The team developing a set of portable SystemVerilog examples decided to organize the first event in Silicon […]
The first Silicon Valley meetup on portable SystemVerilog examples for ASIC and FPGA
Need to start your career or hobby in digital design and verification of silicon chips […]