For the last 30 years digital chip design is not done by schematic entry anymore: hardware engineers write code just like software engineers. The difference is that the code a software engineer writes becomes a chain of CPU instructions stored in memory, while the code a hardware engineer writes in […]
Toward the January meetup on portable SystemVerilog examples in Silicon Valley
The team developing a set of portable SystemVerilog examples decided to organize the first event in Silicon Valley on Sunday, January 14 from 2PM till 5PM at Hacker Dojo in Mountain View, CA. If the first event is successful we are going to make it recurrent. You can register for the event on Meetup or LinkedIn. […]
The first Silicon Valley meetup on portable SystemVerilog examples for ASIC and FPGA
Need to start your career or hobby in digital design and verification of silicon chips or reconfigurable hardware? Explore multiple FPGA toolchains and open-source ASIC tools? Design your own RISC-V CPU or ML accelerator? Prepare for an interview in SystemVerilog? Come to our first Silicon Valley meetup on portable SystemVerilog […]